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DTC144TT1
Preferred Devices
Bias Resistor Transistor
NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC-59 package which is designed for low power surface mount applications.
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NPN SILICON BIAS RESISTOR TRANSISTOR
PIN 3 COLLECTOR (OUTPUT) PIN 1 EMITTER (GROUND)
* * * * * * *
Simplifies Circuit Design Reduces Board Space Reduces Component Count Moisture Sensitivity Level: 1 ESD Rating: Human Body Model: Class 1 ESD Rating Machine Model: Class B The SC-59 package can be soldered using wave or reflow. The modified gull-winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. Pb-Free Package is Available
PIN 2 BASE (INPUT)
R1 R2
3 1
2
MAXIMUM RATINGS (TA = 25C unless otherwise noted)
Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit Vdc Vdc mAdc
SC-59 CASE 318D STYLE 1
MARKING DIAGRAM
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation TA = 25C Derate above 25C Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Lead Junction and Storage Temperature Range Symbol PD Max 230 (Note 1) 338 (Note 2) 1.8 (Note 1) 2.7 (Note 2) 540 (Note 1) 370 (Note 2) 264 (Note 1) 287 (Note 2) -55 to +150 Unit mW C/W C/W C/W C 8T = Specific Device Code M = Date Code* G = Pb-Free Package (Note: Microdot may be in either location) *Date Code orientation may vary depending upon manufacturing location. 1 8T M G G
RqJA RqJL TJ, Tstg
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. FR-4 @ Minimum Pad 2. FR-4 @ 1.0 x 1.0 inch Pad
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 2 of this data sheet.
Preferred devices are recommended choices for future use and best overall value.
(c) Semiconductor Components Industries, LLC, 2005
1
October, 2005 - Rev. 2
Publication Order Number: DTC144TT1/D
DTC144TT1
DEVICE MARKING AND RESISTOR VALUES
Device DTC144TT1 DTC144TT1G Marking 8T 8T R1 (K) 47 47 R2 (K) Package SC-59 SC-59 (Pb-Free) Shipping 3000/Tape & Reel 3000/Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic OFF CHARACTERISTICS Collector-Base Cutoff Current (VCB = 50 V, IE = 0) Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0) Collector-Base Breakdown Voltage (IC = 10 mA, IE = 0) Collector-Emitter Breakdown Voltage (Note 3) (IC = 2.0 mA, IB = 0) ON CHARACTERISTICS (Note 3) DC Current Gain (VCE = 10 V, IC = 5.0 mA) Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 1 mA) Output Voltage (on) (VCC = 5.0 V, VB = 3.5 V, RL = 1.0 kW) Output Voltage (off) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW) Input Resistor 3. Pulse Test: Pulse Width < 300 ms, Duty Cycle < 2.0% hFE VCE(sat) VOL VOH R1 160 - - 4.9 32.9 350 - - - 47 - 0.25 0.2 - 61.1 Vdc Vdc Vdc kW ICBO ICEO IEBO V(BR)CBO V(BR)CEO - - - 50 50 - - - - - 100 500 0.2 - - nAdc nAdc mAdc Vdc Vdc Symbol Min Typ Max Unit
350 PD, POWER DISSIPATION (mW) 300 250 200 150 100 50 0 -50 RqJA = 370C/W 0 50 100 TA, AMBIENT TEMPERATURE (C) 150
Figure 1. Derating Curve
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DTC144TT1
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V
ISOLATED LOAD
FROM mP OR OTHER LOGIC
Figure 2. Level Shifter: Connects 12 or 24 Volt Circuits to Logic
+12 V
VCC
OUT IN LOAD
Figure 3. Open Collector Inverter: Inverts the Input Signal
Figure 4. Inexpensive, Unregulated Current Source
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DTC144TT1
PACKAGE DIMENSIONS SC-59 CASE 318D-04 ISSUE G
D
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER.
3
HE
2
1
E
b e
DIM A A1 b c D E e L HE
MIN 1.00 0.01 0.35 0.09 2.70 1.30 1.70 0.20 2.50
MILLIMETERS NOM MAX 1.15 1.30 0.06 0.10 0.43 0.50 0.14 0.18 2.90 3.10 1.50 1.70 1.90 2.10 0.40 0.60 2.80 3.00
MIN 0.039 0.001 0.014 0.003 0.106 0.051 0.067 0.008 0.099
INCHES NOM 0.045 0.002 0.017 0.005 0.114 0.059 0.075 0.016 0.110
MAX 0.051 0.004 0.020 0.007 0.122 0.067 0.083 0.024 0.118
A A1 L
C
SOLDERING FOOTPRINT*
0.95 0.037 0.95 0.037
2.4 0.094
1.0 0.039 0.8 0.031
mm inches
SCALE 10:1
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
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DTC144TT1/D

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